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These simple design rules could turn the chip industry on its head – MIT Technology Review

Posted by timmreardon on 02/18/2025
Posted in: Uncategorized.


An open standard called RISC-V is rewriting the economics of chip design and shaking up the tech sector’s power dynamics.

By Sophia Chen

January 24, 2023

RISC-V is one of MIT Technology Review’s 10 Breakthrough Technologies of 2023. Explore the rest of the list here.

Python, Java, C++, R. In the seven decades or so since the computer was invented, humans have devised many programming languages—largely mishmashes of English words and mathematical symbols—to command transistors to do our bidding. 

But the silicon switches in your laptop’s central processor don’t inherently understand the word “for” or the symbol “=.” For a chip to execute your Python code, software must translate these words and symbols into instructions a chip can use.  

Engineers designate specific binary sequences to prompt the hardware to perform certain actions. The code “100000,” for example, could order a chip to add two numbers, while the code “100100” could ask it to copy a piece of data. These binary sequences form the chip’s fundamental vocabulary, known as the computer’s instruction set. 

For years, the chip industry has relied on a variety of proprietary instruction sets. Two major types dominate the market today: x86, which is used by Intel and AMD, and Arm, made by the company of the same name. Companies must license these instruction sets—which can cost millions of dollars for a single design. And because x86 and Arm chips speak different languages, software developers must make a version of the same app to suit each instruction set. 

Lately, though, many hardware and software companies worldwide have begun to converge around a publicly available instruction set known as RISC-V. It’s a shift that could radically change the chip industry. RISC-V proponents say that this instruction set makes computer chip design more accessible to smaller companies and budding entrepreneurs by liberating them from costly licensing fees. 

“There are already billions of RISC-V-based cores out there, in everything from earbuds all the way up to cloud servers,” says Mark Himelstein, the CTO of RISC-V International, a nonprofit supporting the technology. 

In February 2022, Intel itself pledged $1 billion to develop the RISC-V ecosystem, along with other priorities. While Himelstein predicts it will take a few years before RISC-V chips are widespread among personal computers, the first laptop with a RISC-V chip, the Roma by Xcalibyte and DeepComputing, became available in June for pre-order.

What is RISC-V?

You can think of RISC-V (pronounced “risk five”) as a set of design norms, like Bluetooth, for computer chips. It’s known as an “open standard.” That means anyone—you, me, Intel—can participate in the development of those standards. In addition, anyone can design a computer chip based on RISC-V’s instruction set. Those chips would then be able to execute any software designed for RISC-V. (Note that technology based on an “open standard” differs from “open-source” technology. An open standard typically designates technology specifications, whereas “open source” generally refers to software whose source code is freely available for reference and use.)

A group of computer scientists at UC Berkeley developed the basis for RISC-V in 2010 as a teaching tool for chip design. Proprietary central processing units (CPUs) were too complicated and opaque for students to learn from. RISC-V’s creators made the instruction set public and soon found themselves fielding questions about it. By 2015, a group of academic institutions and companies, including Google and IBM, founded RISC-V International to standardize the instruction set. 

The most basic version of RISC-V consists of just 47 instructions, such as commands to load a number from memory and to add numbers together. However, RISC-V also offers more instructions, known as extensions, making it possible to add features such as vector math for running AI algorithms. 

With RISC-V, you can design a chip’s instruction set to fit your needs, which “gives the freedom to do custom, application-driven hardware,” says Eric Mejdrich of Imec, a research institute in Belgium that focuses on nanoelectronics.

Previously, companies seeking CPUs generally bought off-the-shelf chips because it was too expensive and time-consuming to design them from scratch. Particularly for simpler devices such as alarms or kitchen appliances, these chips often had extra features, which could slow the appliance’s function or waste power. 

Himelstein touts Bluetrum, an earbud company based in China, as a RISC-V success story. Earbuds don’t require much computing capability, and the company found it could design simple chips that use RISC-V instructions. “If they had not used RISC-V, either they would have had to buy a commercial chip with a lot more [capability] than they wanted, or they would have had to design their own chip or instruction set,” says Himelstein. “They didn’t want either of those.”

RISC-V helps to “lower the barrier of entry” to chip design, says Mejdrich. RISC-V proponents offer public workshops on how to build a CPU based on RISC-V. And people who design their own RISC-V chips can now submit those designs to be manufactured free of cost via a partnership between Google, semiconductor manufacturer SkyWater, and chip design platform Efabless. 

What’s next for RISC-V

Balaji Baktha, the CEO of Bay Area–based startup Ventana Micro Systems, designs chips based on RISC-V for data centers. He says design improvements they’ve made—possible only because of the flexibility that an open standard affords—have allowed these chips to perform calculations more quickly with less energy. In 2021, data centers accounted for about 1% of total electricity consumed worldwide, and that figure has been rising over the past several years, according to the International Energy Agency. RISC-V chips could help lower that footprint significantly, according to Baktha.

However, Intel and Arm’s chips remain popular, and it’s not yet clear whether RISC-V designs will supersede them. Companies need to convert existing software to be RISC-V compatible (the Romasupports most versions of Linux, the operating system released in the 1990s that helped drive the open-source revolution). And RISC-V users will need to watch out for developments that “bifurcate the ecosystem,” says Mejdrich—for example, if somebody develops a version of RISC-V that becomes popular but is incompatible with software designed for the original.

RISC-V International must also contend with geopolitical tensionsthat are at odds with the nonprofit’s open philosophy. Originally based in the US, they faced criticism from lawmakers that RISC-V could cause the US to lose its edge in the semiconductor industry and make Chinese companies more competitive. To dodge these tensions, the nonprofit relocated to Switzerland in 2020. 

Looking ahead, Himelstein says the movement will draw inspiration from Linux. The hope is that RISC-V will make it possible for more people to bring their ideas for novel technologies to life. “In the end, you’re going to see much more innovative products,” he says. 

Sophia Chen is a science journalist based in Columbus, Ohio, who covers physics and computing. In 2022, she was the science communicator in residence at the Simons Institute for the Theory of Computing at the University of California, Berkeley.

Article link: ttps://www-technologyreview-com.cdn.ampproject.org/c/s/www.technologyreview.com/2023/01/24/1064974/riscv-chip-design-10-breakthough-technologies-2023/amp/

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